Product/Service

PC-Based VHDL-AMS Simulator

The hAMSter VHDL-AMS simulator is a high performance AMS tool for engineering and research and is intended for designers in education, research and development who are interested in modeling using VHDL-AMS
N/AAMSter VHDL-AMS simulator is a high performance AMS tool for engineering and research and is intended for designers in education, research and development who are interested in modeling using VHDL-AMS. The simulator comes in a package with a source code editor with syntax coloring. The user can create hierarchical models using already predefined designs. An example collection gives a good overview about the modeling capabilities of the language and the ease of model generation using VHDL-AMS. Once the model is defined, the user can choose from different integration algorithms and nonlinear solvers. In a simulator specific dialog, all integration parameter and outputs can be defined.

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